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2010-2012 Microchip Technology Inc.

DS41412F-page 69

PIC18(L)F2X/4XK22

5.0

MEMORY ORGANIZATION

There are three types of memory in PIC18 Enhanced

microcontroller devices:

Program Memory

Data RAM

Data EEPROM

As Harvard architecture devices, the data and program

memories

use

separate

buses;

this

allows

for

concurrent access of the two memory spaces. The data

EEPROM, for practical purposes, can be regarded as

a peripheral device, since it is addressed and accessed

through a set of control registers.

Additional detailed information on the operation of the

Flash program memory is provided in Section 6.0

“Flash

Program

Memory”.

Data

EEPROM

discussed separately in Section 7.0 “Data EEPROM

Memory”.

5.1

Program Memory Organization

PIC18 microcontrollers implement a 21-bit program

counter, which is capable of addressing a 2-Mbyte

program memory space. Accessing a location between

the upper boundary of the physically implemented

memory and the 2-Mbyte address will return all ‘0’s (a

NOP

instruction).

This family of devices contain the following:

PIC18(L)F23K22, PIC18(L)F43K22: 8 Kbytes of

Flash Memory, up to 4,096 single-word instructions

PIC18(L)F24K22, PIC18(L)F44K22: 16 Kbytes of

Flash Memory, up to 8,192 single-word instructions

PIC18(L)F25K22, PIC18(L)F45K22: 32 Kbytes of

Flash Memory, up to 16,384 single-word instruc-

tions

PIC18(L)F26K22, PIC18(L)F46K22: 64 Kbytes of

Flash Memory, up to 37,768 single-word

instructions

PIC18 devices have two interrupt vectors. The Reset

vector address is at 0000h and the interrupt vector

addresses are at 0008h and 0018h.

The program memory map for PIC18(L)F2X/4XK22

devices is shown in Figure 5-1. Memory block details

are shown in Figure 20-2.

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